Become a member of a world-class analog design team in providing high performance analog and mixed mode circuits for leading data communications and networking products. Designers have opportunities to design regulators, high performance analog-to-digital converters (ADC), digital-to-analog converters (DAC), filter, adaptive equalizers, clock and data recovery (CDR) circuits, and phase-locked loop (PLL) or other timing circuits. Team members participate in circuit architecture, circuit implementation, design review, layout, and silicon validation. – MS/PHD in EE. – Deep understanding on device physics. – Design experience in basic analog circuits, such as Op-Amp, comparator, bandgap, regulator, etc. – Design experience in areas below is a plus, such as analog-to-digital converters (ADC), digital-to-analog converters (DAC), PGA/VGA, filter, adaptive equalizers, clock and data recovery (CDR) circuits, and phase-locked loop (PLL). – Knowledge in signal processing and communication theories is a plus. – Familiar with EDA design tools such as Hspice, Virtuoso, etc. – Good team player and communication skills. – Good English skill.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.