Join us in the Xeon Performance Group (XPG) delivering on next generation Xeon products IPs for Server markets. We are looking for a passionate and willing to learn individuals to contribute on the Register Transfer Level (RTL) Design and Verification team.
You will have the opportunity to work with teams involved in analyzing and implementing key features.
Your responsibilities will include but not be limited to:
- Perform logic design, Register Transfer Level (RTL) coding per the Microarchitecture specifications.
- Provide IP integration support to SoC customers and represent the RTL team.
- Create test plan and develop test bench using OVM/UVM methodology.
- Perform IP and block level coverage driven verification.
- Perform Formal Verification, Low Power Verification, Performance Verification, Co-Simulation, Emulation, etc.
- Developing with FPGA and Emulation-based validation platforms.
- Scripting in languages such as Perl/Python.
The ideal candidate should exhibit the following behavioral traits:
- Self-motivated individual willing to take and follow directions and deliver to schedule
- Communication and interpersonal skills
- Quantitative, analytical, problem-solving skills, and problem/conflict resolution skills
- Effective prioritization and time management skills
Qualifications
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your schoolwork/classes/research and/or relevant previous job and/or internship experiences. This is an entry level position and will be compensated accordingly.
Minimum Qualifications:
The candidate must have a Bachelor's with 3+ years of experience or Master's or PhD degree in Electrical Engineering (EE), Computer Engineering or related field and experience in:
- VLSI Design and Architectures
- Digital Systems and Circuits
- Electronic Design Automation tools flows and methodology
Preferred qualifications:
1+ years of experience in some of the following areas:
- RTL design and coding expertise using Verilog and/or VHDL for verification and testing digital circuits
- Hardware Acceleration and FPGA Computing
- System Verilog, UVM and/or OVM testbench development
- Scripting in Python/Perl.
- Familiarity with hardware design flows (EDA): CDC, Lint, Synthesis, Logic Equivalence Checking, Timing
Xeon and Networking Engineering (XNE) focuses on the development and integration of XEON and Networking SOC's and critical IP's sustain Intels Xeon and 5G networking roadmap.
Intel Corporation will require all new U.S. employees to be fully-vaccinated for Covid-19 as a condition of hire unless they have an approved accommodation in place under applicable law. Newly-hired employees will be required to provide proof of vaccination prior to their start date.
Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Annual Salary Range for jobs which could be performed in US, Colorado:
$74,700.00-$111,830.00
Benefits:
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, and benefit programs. Find more information about our Amazing Benefits here
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