A High Volume Engineer (HVE) lab planner is responsible for coordinating activities in the HVE lab.

Work requires good communication and administrative skills to plan lab activities, maintain inventory, arrange headcount to support, problem solve and coordinate the day-to-day operations of the HVE labs.

HVE lab planner responsibilities include but not limited to: 
 

• Chair the daily ops meeting and report out daily for the tool issues, work order completion, and indicators.
• Loading plan for the day and the weekend.
• Hold operations meeting to deal with immediate problems. Report out and escalate issues to seek help to solve those issues.
• Manage on tool preventive maintenance and any other scheduled down time.
• Reporting Actual Utilization Cell, Task completion rate, Daily / Monthly Indicator
• Collateral tracking of all lab tool related.
• Negotiation with various groups for the timeline and number of collaterals that can be used for the lab tool.
• Collateral forecasting and purchasing.
• Come out with solutions on making changes to process and loading plan when needed.

Qualifications

The successful candidate will be a Bachelor or Master Graduate in Electrical Engineering Electronic Engineering Telecommunication Automation and Control Engineering Computer Engineering or Computer Science, Industrial Engineering.

Fresh graduate or have 2 years of relevant experience.

In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel’s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore’s Law and groundbreaking innovations.  DEG is Intel’s engineering group, supplying silicon to business units as well as other engineering teams.  As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.