We are a global leader, creating world-changing technology that enables progress and enriches lives. Intel is at the intersection of several technology inflections - artificial intelligence, 5G network transformation, and the rise of the intelligent edge- that together will shape the future of technology.

As a member of Intel's Programmable Solutions Group, you will use your knowledge of Logic Design, Verification, and FPGA technology to lead pre-silicon verification efforts (including IP, integration, and full-chip aspects), both internal and external, to use the Structured ASIC technology.

Structured ASIC team:

This is a structured ASIC team under Intel's PSG targeting 5G, cloud computing, and high-end consumer application space. Intel eASIC devices are structured ASICs, an intermediary technology between FPGAs and standard-cell ASICs bridging the gap between FPGA and Custom ASIC.

The position requires a self-driven candidate with deep knowledge in design, verification and communication interfaces, coupled with good communication skills.

Responsibilities for this role include, but are not limited to the following:

• Own verification of assigned IP integration and/or SoC level flows Develop verification strategy, requirements, environments, tools, and methodologies for assigned IP blocks.

• Apply your knowledge of verification principles and techniques and your judgement to write test plans and implement them by developing tests, test generators, test benches, checkers, coverage, and other verification collateral.

• Run tests, debug failures to root cause, and recommend solutions.

• Collaborate with cross-functional teams to drive continuous improvement to both the design, verification plans/collateral, and to methodology to prevent, reduce, and/or find bugs sooner, more easily, or more reliably.

Qualifications

You must possess the below minimum education requirements and minimum required qualifications to be initially considered for this position. Relevant experience can be obtained through schoolwork, classes, project work, internships, and/or military experience. Additional preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Education:

• Bachelors' degree in Electrical Engineering, Electrical Electronics or Computer Engineering.

Minimum Qualifications:

• 7+ years of experience in pre-si verification of ASICs including high speed IO and SERDES.

• 7+ years of experience in FPGAs or ASICs, SERDES, and networking applications.

• 7+ years of experience in test plan definition and testcase development in C/Assembly/System Verilog.

• 7+ years of experience in verifying design at RTL level and gate-level simulation.

• 7+ years of experience in coverage analysis, performance verification, and use-case verification.

• 5+ years of experience in functional test vector development and post-silicon bring-up/debug.

• 5+ years of experience with scripting languages (e.g., Perl, Python, Shell).

Preferred Qualifications:

• Experience in analog and digital design.

• Masters' degree in Electrical Engineering, Electrical Electronics or Computer Engineering with 3+ years of experience.

Inside this Business Group

The Data Platforms Engineering and Architecture (DPEA) Group invents, designs & builds the world's most critical computing platforms which fuel Intel's most important business and solve the world's most fundamental problems. DPEA enables that data center which is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologies—spanning software, processors, storage, I/O, and networking solutions—that fuel cloud, communications, enterprise, and government data centers around the world.

Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.