If you are a strong ASIC/FPGA Design Engineer with a passion for pre-Si verification and working on Intel's latest SoC architecture then our Intel Validation Engineering (IVE) department has an opportunity for you!
IVE is responsible for silicon validation of nearly every SoC product across both server and client segments. Content and Coverage Solutions (CCS) in IVE delivers leading edge solutions for validation of server and client SoCs. You'll be joining a strong team with a clear vision of delivering Intel's validation tool solutions by using creativity and innovation. Pre-Si Verification Lead for cutting-edge high-speed protocols: PCIe, CXL, USB.
You will lead the SoC pre-Si validation team whose responsibilities include:
Validation of IPs, subsystem, and SOC level design Lead definition of validation strategy and plans, methodology, test environment, and execution
Work closely with the logic, integration, and physical design teams to deliver a converged, fully validated design through tape-out.
Ensure the design meets the specifications.
Evaluate existing validation IP/collateral to make reuse/new design decisions and create IP agreements with providing organizations.
Mentor validation engineers.
Review and direct technical aspects of engagement with contingent workforce.
Strong written and verbal communication skills.
Strong analytical willingness and problem solving skills.
Willingness to work effectively with both internal and external teams/customers is expected.
Experience setting objectives and goals, schedules, and staging plans.
Experience tracking execution progress and enabling the team
Qualifications
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications
The candidate must have a Bachelor's Degree in Electrical/Computer Engineering or Computer Science and 6+ years of experience -OR- a Master's Degree in Electrical/Computer Engineering or Computer Science and 4+ years of experience -OR- a PhD in Electrical/Computer Engineering or Computer Science and 2+ years of experience in:
IP or SOC level validation
Leading validation of IPs and/or SOC from spec to tape-in including setting validation strategy, creating test bench and components, defining test plan, writing tests, debugging, coverage and analysis
UVM/OVM testbench
Tools, flows, and SOC methodologies for verification
The everyday contributions of the Intel Validation Engineering (iVE) team are essential to retaining/regaining Intel's product leadership. We validate, debug, and tune the newest designs and world-changing technologies that enrich the lives of every person on earth. We play a critical role in completing the PRQs of Intel products and in Intel's ability to deliver the annual technology platforms in our roadmap.
Other Locations
US, California, Santa Clara;US, Oregon, Hillsboro;US, Texas, Austin
Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.
Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.
Get email alerts for the latest"ASIC/FPGA Pre jobs in Folsom"
