ATTD Package Substrate Design Rule Owner
Intel CorporationPhoenixUpdate time: July 1,2022
Job Description

The Assembly and Test Technology Development (ATTD) group at Intel develops industry-leading microelectronic packaging technologies for Intel's Client and Data Center CPUs, Graphics and Networking products, and Intel Foundry Services customers. As an ATTD Package Substrate Design Rule Owner (DRO) you will join the centralized team at Intel responsible for definition, validation and deployment of design rules for package substrate design. The DRO collaborates with product design, substrate manufacturing and package assembly to identify and drive design rules that enable competitive product designs that meet cost and manufacturability requirements. A key part of this role is being involved from the earliest stages of technology and product concept through to product design tape out. The DRO works across product families to drive a consistent Design Rule strategy and a forward-looking, industry-leading Design Rule roadmap. This position involves working with cross-disciplinary and cross-organizational stakeholders and interfacing directly with product designers. Interaction with external suppliers and customers can also be expected in this role. This will be a hybrid position

The candidate should also exhibit the following behavioral traits/skills: 

  • Data analysis and problem solving skills

  • Experience with design tools like Mentor or Cadence design software

  • Self-motivated, collaborative style with a good tolerance for ambiguity

  • Organizational, time management, and communication skills.


Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum qualifications and are considered a plus factor in identifying top candidates.

Minimum Qualification:

  • Bachelor's + 9 years' experience, Master's + 6 years' experience or Ph.D. + 4 years' experience in Electrical Engineering/ Chemical Engineering/ Mechanical Engineering or Physics/Material Science.


Preferred qualifications include:

  • Background or knowledge in semiconductor fabrication and packaging

  • Experience or knowledge of package substrate physical design, thermo-mechanical and electrical performance, and substrate manufacturing and assembly process.

Inside this Business Group

As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support.  Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth.


Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.



Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.

USExperienced HireJR0228601PhoenixTechnology and Manufacturing

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