JOB RESPONSIBILITY:
1. Multimedia IP design including Video Decoder, Video Post Processing, Audio, etc.
2. Testbench creation, and verification for module level, IP level, and system level.
3. IP delivery for SoC projects, and co-work with SoC team to make sure the quality of IP meets the quality criteria.
JOB QUALIFICATIONS:
1. Bachelor or Master in Micro Electronics, Electronic Engineering, Computer Science or related;
2. More than 3 years experience in related field;
3. Familiar with Verilog and C language;
4. Familiar with following domain(s) is one plus
1) Image processing
2) Video processing
3) Video codec
4) Audio processing
职能类别: 集成电路IC设计/应用工程师
联系方式
上班地址:四川省成都市双流区东升街道银河路596号综合楼11楼
Get email alerts for the latest"Asic Design Engineer(Multimedia) jobs in Chengdu"
