The ICVS-DVT Product Engineering team is looking for a Product Engineer to join our team in Cairo, Egypt. We are looking for an outstanding candidate to join a world-wide team driving Questa® inFact™ Portable Stimulus product. The candidate will have the opportunity to explore advanced functional verification technologies as well as develop solid expertise in digital functional verification field using a wide set of CAD tools and hardware description languages. Siemens DISW introduced the first successful commercial tool for portable stimulus. Portable stimulus raises the level of verification abstraction and enables users to automate testing of the complex scenarios that emerge in block, subsystem, and SoC level verification. Accellera’s Portable Test and Stimulus Standard defines a specification to create a single representation of stimulus and test scenarios usable by a variety of users across many levels of integration under different configurations. With this standard, users can specify a set of behaviors once and observe consistent behavior across multiple implementations. Main Responsibilities Focus on solutions scalability. Ensure optimal project requirements, especially with respect to deploy-ability and quality. Interact closely with worldwide software engineering, product marketing, WTO and customers. Engage early adopters and ensure success with new key developments and features. Develop use models and test cases for US., Europe, and PacRim customers. Act as customer’s champion in product core team. Develop high-class training collateral and conduct field and customer training classes. Provide in-depth second-line technical support for beta and early production ramp-up. Explore customer challenges during deployments. Required skills, knowledge and experience B.Sc./M.Sc. in Computer Engineering, Electronics Engineering or Computer Science. Strong knowledge of the digital design and verification flow (SystemVerilog and UVM). Knowledge of digital verification in emulation flow is a huge plus! Good knowledge of Questa® Simulation flow is preferred. Prior knowledge of SV functional coverage and code coverage metrics is a plus. Experience in writing SoC bring-up tests in C or assembly is preferred. Knowledge of computer architecture (processor architecture, bus interconnects, etc.) Prior knowledge and experience of CAD tools usage and/or development is a plus Highly developed communication skills, including the ability to present ideas and share your knowledge with others. Organization: Digital Industries Company: Mentor Graphics Egypt Company (A Limited Liability Company - Private Free Zone) Experience Level: Experienced Professional Job Type: Full-time