We created the Intel Atom Processor (E-Core), a disruptive technology that enables a broad range of devices including entry PC's, smartphones, modems, 2 in 1 laptops, micro-servers, and other Internet-of-Things IoT devices. You will be part of a team, participating in the design of a future generation high performance Intel Atom microprocessor. This role requires a engineer with strong analytic and problem solving skill, an ability to communicate well, and willing to share and discuss issues.
Become a key member of a team participating in the physical design construction and integration and verification of a future Intel CPU. This position requires an engineer with broad physical design and STA skills, coupled with leadership skills necessary to drive methodology and to collaborate effectively with multiple functional teams within the CPU design team. We are looking for a talented individual to drive the physical convergence of a Full-Chip (FC) assembly of partitions.

As a Full Chip design engineer, you will perform floorplanning, pin and feedthrough planning, repeater insertion, power grid generation and assembly of partitions. Given the need for executing multiple projects in parallel, you will be responsible for driving efficiency and quality improvements to the overall FC methodology - including floorplan optimization for better utilization/QoR/runtime and timing and physical aware feedthrough/pin placement. You will also be responsible for coordinating collateral handoffs between the FC Design team and other functions within back-end design such as Clocking, Power Delivery and Partition synthesis/APR. You will drive physical design and timing closure including FEV, LVS, DRC, and reliability verification (IR drop / EM analysis).

The ideal candidate should have an aptitude to work effectively with EDA tools and exhibit behavioral traits that indicate:
- Ability to work well in a team and be productive under aggressive schedules
- Excellent written and verbal communications skills
- Self-motivation and well organized

Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum qualifications
Must have either BS or MS in Electrical Engineering or Computer Engineering
Minimum 8 years of experience in
- CPU physical design and timing verification
- Synthesis/APR flows on multi voltage high frequency designs including custom polygon editing
- Tcl scripting
- Noise, cross-talk, OCV analysis.
- Floorplanning and physical design and timing closure.
- Formal equivalence, DRC/LVS, IR and electro-migration checks
- Preferred qualifications

10+ years of experience with the above skill sets
Experience with Fusion Compiler, DCT, DCE, ICC2, RedHawk, ICV, Conformal, Calibre, PrimeTime, StarRCXT

Inside this Business Group

In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel’s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore’s Law and groundbreaking innovations.  DEG is Intel’s engineering group, supplying silicon to business units as well as other engineering teams.  As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.