CAD Engineer
Intel CorporationBangaloreUpdate time: June 14,2022
Job Description

In this role you will be leading a team of size 7+ people in timing/quality checks and timing/area/power optimization area. You will be part of a team  responsible for static timing/Optimization tools/flow and methodology development/deployment.  Responsible will include but not limited to

  • Enabling/Developing/Enhancing Tools Flows and Methodology (TFM) for Core and Client programs
  • Enable the team in meeting design and development targets by working closely with in-house Design automation experts and external tool vendors
  • Continuously work on improving the TFM efficiency and work with Global Design Automation expert team to incorporate the same
  • Understands different methodologies used across different groups in Intel and Industry to adopt best practices
  • Be one point contact for the design team for TFM in STA domain.


Qualifications

Candidate must have a Bachelor/Master degree in VLSI and 10+ years of experience in

  • Managing/leading  a team of 5+ people in STA domain.
  • Hands on experience with industry standard tools like PrimeTime, PT-SI, PT ECO, Tweaker. 
  • VLSI Design Automation and Development
  • Programming and software development in Perl, Tcl, Python
  • Should have good understanding of  static timing analysis and latch based design and hierarchical timing analysis.

-      Good understanding and exposure to overall SoC cycle.

Inside this Business Group

In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel’s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore’s Law and groundbreaking innovations.  DEG is Intel’s engineering group, supplying silicon to business units as well as other engineering teams.  As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.



Other Locations

India, Hyderabad



Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.


Legal Disclaimer:

Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.

It has come to our notice that some people have received fake job interview letters ostensibly issued by Intel, inviting them to attend interviews in Intel’s offices for various positions and further requiring them to deposit money to be eligible for the interviews.   We wish to bring to your notice that these letters are not issued by Intel or any of its authorized representatives. Hiring at Intel is based purely on merit and Intel does not ask or require candidates to deposit any money. We would urge people interested in working for Intel, to apply directly at www.jobs.intel.com and not fall prey to unscrupulous elements.


INExperienced HireJR0224924BangaloreDesign Engineering Group

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