We're looking for motivated and talented engineers to join the E-Core CPU verification team.

You will join the team responsible for exhaustively verifying the architecture and micro-architecture changes implemented in the CPU using a combination of dynamic and formal verification methods.

Your responsibilities may include, but are not limited to, the following:
Technical ownership of formal verification of a microarchitecture block, methodology, or otherwise significant aspect of the E-Core CPU
Understand and contribute to micro-architecture specification and define the formal verification strategy for a significant portion of the design
Lead ROI analysis and recommend appropriate use of formal verification vs dynamic validation techniques for relevant parts of the CPU
Document formal test plans and drive technical reviews of plans and proofs with design and architecture teams
Post-silicon failure debug and sighting resolution
Mentor junior team members
Develop validation automation tools to accelerate execution
Collaborate on validation approach and strategy beyond immediate team

Qualifications

Minimum Requirements: PhD in Computer Engineering or Electrical Engineering with emphasis on formal verification and 2 or more years of relevant experience, M.S. in Computer Engineering or Electrical Engineering with 5 or more years of relevant work experience OR B.S. in Computer Engineering or Electrical Engineering plus 6 years of relevant work experience.

Experience in the following areas:
In-depth computer architecture knowledge with emphasis on out of order processor execution, memory hierarchy, and memory management
Hands on experience with industry standard formal verification tools such as JasperGold, IFV, Questa Formal, VC Formal
Experience with applying sequential equivalence checking in complex micro-architectures
Experience with formal abstractions and other complexity reduction techniques
Experience with a hardware modeling language, such as Verilog, VHDL, or System Verilog and industry standard logic simulation tools
Experience in assertion writing, checker development, coverage analysis, failure debug, root cause analysis
Programming experience in at least one language: C/C++, Perl, Python, Ruby, Java, TCL, etc.
Intel or industry experience in pre-silicon verification of CPU cores, including specific areas of technical ownership/expertise relevant to CPUs

Preferred Experience:
Knowledge of Intel Architecture ISA and system architecture, x86 assembly language.
Post-silicon debug and analysis
Research publications, patent filings, or other evidence of personal technical innovation in validation methodology advancement.

Inside this Business Group

In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel’s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore’s Law and groundbreaking innovations.  DEG is Intel’s engineering group, supplying silicon to business units as well as other engineering teams.  As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.