Seize the opportunity to work with the team responsible for RTL logic design and microarchitecture of chipsets for PCs millions of people around the world will use. The Chipsets Logic Team is part of the Chipsets Silicon Group CSG within Design Engineering Group and is responsible for developing Soft IPs Subsystems and Gaskets for client and server chipsets.

As a Chipsets Logic Design Micro Architect a typical day may include but is not limited to:
- Developing architecture and micro-architecture specifications and participating development of architecture specifications for the Logic components subsystem with SIP HIP interoperability validation
- Performing logic design Register Transfer Level RTL coding and formal verification
- Providing IP integration support to SoC customers and represents RTL team
- Performing tools and flows to qualify the logic implemented such as RTL, DFx, linting, clock and reset domain crossing check, synthesizability check to meet design QoR, timing constraint definition and review gatecount, power optimization, etc
- Reviewing verification plan and implementation to ensure the design features are verified correctly

You are
- An excellent communicator
- Extremely organized
- A team player who loves to collaborate
- A strong technical leader who communicates well with great influencing skills
- Passionate for design, tools and methodology
- Strong in analysis debugging skills and creative in problem solving

- Someone who meets their commitments
- Motivated
- Self driven
- Someone who wants to make a difference through technology
- People who want to do innovative things

We are
- Open to new ideas and methodologies
- A collaborative team demonstrating the best teamwork across Intel
- Here to help you succeed

If your skillsets align with our needs we will provide you a great path to maximize your positive impact on the world.

Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:

The candidate must possess a minimum of Bachelor Degree in Electronics Engineering, Computer Engineering, Computer Science or equivalent with experience in:

- 10+ years of relevant logic design microarchitecture or pre silicon verification experience with multiple project cycles
- 10+ years of PC Architecture experience
- 7+ years of experience in developing micro architect specifications based on High Level Architecture specifications
- 7+ years of experience in SIP and HIP interoperability design and verification
- Capable in reviewing test plan and contents and coverage points for validation purpose based on High Level Architecture specifications
- VLSI or Structural and Physical design flow, methodology experience
- Power management design experience

Preferred Qualifications:

- UFS, SPI, USB, PCI express or any industry standard BUS protocol experience
- Strong chipset CPU level understanding required on power consumption, power estimation and low power design methods
- Experienced with various tools and methodologies including but not limited to System Verilog, Python/Perl/Shell scripting, VCS Synopsys simulators, interactive debugger, RTL model build, power aware simulation, design for test, design for verification, coverage based random constraint simulation, etc.

Inside this Business Group

In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel’s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore’s Law and groundbreaking innovations.  DEG is Intel’s engineering group, supplying silicon to business units as well as other engineering teams.  As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.

Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.