The Production Libraries Group is looking for a College Graduate (CG) to work in the area of standard cell library design and validation using Intel latest process technology for use by Intel CPU, Atom, Graphics, mixed signal IPs, Client, Sever, Chipset projects and IFS Foundry customers.

The successful candidate will be part of the Production Libraries team responsible for standard cells validation enablement doing EDA tools execution, validation automation development and maintenance, and design issues resolution.

Responsibilities include, but are not limited to:

• Exercise EDA tools to evaluate and measure quality, performance, and design targets of standard cells.

• Develop, maintain, and validate automation and methodologies for improved standard cell collateral quality.

• Maintain validation tool configurations, educate stakeholders on validation tool capabilities, and support stakeholders for results review.

Traits we're looking for in a candidate:

• Possesses excellent written and verbal communication skills.

• Solid customer/result orientation and the willingness to work with external, internal partners and with EDA vendors in a flexible manner.

Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:
Candidate must have a Bachelor's degree in the field of electronics engineering or hardware engineering, Electrical and/or Computer Science/Engineering or related fields with 3+ years of experience.

OR

Master's degree in the field of electronics engineering or hardware engineering, Electrical and/or Computer Science/Engineering or related fields with knowledge in:

• Digital circuit design, including CMOS combinatorial logic and sequential element design and layout.

• Good understanding of device physics.

• Solid programming and automation skills with years of experience in one or more areas of VLSI Design Automation (Physical Design Automation, Simulation, Timing Analysis, Reliability Analysis).

• Excellent collaboration skills across geographically distributed teams and willing to handle ambiguity while developing expertise in new areas and delivering excellent, quantifiable results will be key to the success in this role.

• The successful candidate must possess excellent written and verbal communication skills, solid customer/result orientation and the willingness to work with external, internal partners and with EDA vendors in a flexible manner.

Preferred Qualifications:

• Experience with Industry standard ASIC tools - Design Compiler, Genus, Tempus, ICV.

• Experience in digital circuit design, front end model creation and functional verification.

• Digital circuit design, including CMOS combinatorial logic and sequential element design and layout.

• Good understanding of device physics.

• Experience with standard cell library characterization, liberty models and cross validations with front end models and liberty models.

• Experience working with EDA vendors to drive new features and capabilities.

• Knowledge of industry-standard EDA tools for VLSI circuit and layout design.

• Experience working in the Linux environment and its development tools.

• Standard cell level PPA modeling, simulation, and ROI analysis.

• Experience in CMOS power modeling and cell level optimization.

• CMOS and standard cell level device variation and Aging analysis.

• Engineering acumen and analytical skills.

• Debugging skills.

• Customer oriented and willing to work in a dynamic environment.

Inside this Business Group:
IP Engineering Group's (IPG) vision Build IPs that power Intel's leadership products and power our customer's silicon. We want to attract and retain talent who get joy in building high quality IP and share our core belief that IP is fundamental to transforming Intel's silicon design process. IPG's guiding principles will be ensuring Quality (Zero Bugs), Customer Obsession (Delight our Customers) and structured problem solving. We are a fearless organization transforming IP development.

Inside this Business Group

IP Engineering Group's (IPG) vision Build IPs that power Intel's leadership products and power our customer's silicon. We want to attract & retain talent who get joy in building high quality IP and share our core belief that IP is fundamental to transforming Intel's silicon design process. IPG's guiding principles will be ensuring Quality (Zero Bugs), Customer Obsession (Delight our Customers) and structured Problem Solving. We are a fearless organization transforming IP development.

Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.