Digital Verification Engineer (Evergreen) 1
Analog DevicesDallasUpdate time: July 14,2022
Job Description

 

Analog Devices (NASDAQ: ADI) designs and manufactures semiconductor products and solutions. We enable our customers to interpret the world around us by intelligently bridging the physical and digital worlds with unmatched technologies that sense, measure and connect.

 

  • Position can be located in: Colorado Springs CO, Dallas TX, San Jose CA, Beaverton, OR Wilmington, MA

  •  

  • We are seeking a results-oriented Verification engineer to join our team focusing on development of the next generation of ADI’s Gigabit Multimedia Serial Link products delivering best-in-class solutions for in-car infotainment and advanced driver-assistance systems (ADAS).

    A small amount of travel is expected. The position offers opportunities for development.

     

    Job Description

    Responsibilities and Duties include but not limited to:

    • Verification of complex ASIC chips and sub-systems using leading edge verification methodologies.
    • Create verification plans for blocks and full chip by developing a thorough understanding of the design under test.
    • Employ UVM/SystemVerilog based verification methodologies and use assertions, functional/code coverage, formal verification etc. to reach verification goals.
    • Contribute and influence the decisions on methodologies to be adopted for the verification 
    • Gate level simulations and debug of large digital blocks and full-chip ASICs 
    • Develop behavioral models for analog and mixed-signals blocks
    • Support post-silicon validation activities of the products working with design, applications and test teams
  • Job Requirements:

    • Bachelor's or Master’s degree in Electrical or Computer Engineering with 2+ years of experience in digital verification. 
    • Proficient in Verilog, System Verilog, UVM, object-oriented programming, scripting and automation with Perl or Python.
    • Firm understanding of constrained random functional verification, coverage, and assertions
    • Experience with block and full-chip ASIC verification, regressions and coverage closure 
    • Experience with architecting verification environments and components, coverage-based validation and debug
    • Excellent debugging, analytical and problem-solving skills
    • Strong inter-personal, teamwork and communication skills
    • Expected to be highly independent, proactive and result-oriented to achieve verification goals
  • Preferred qualifications:

    • Experience with Mixed-Signal SoC verification and wreal modeling of analog and mixed-signal blocks.
    • Experience verifying protocols and spec compliance (e.g. I2C, UART, SPI, DisplayPort, CSI/DSI, PCIe).
    • Experience with Cadence Virtuoso tools and Mixed-Signal Verification methodology and tools (AMS / APS / Flex)
    • Experience with gate level simulations/debug
    • Experience with lab silicon bring-up, validation and production test support
  • #LI-AC1

 

For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export  licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls.  As such, applicants for this position – except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) – may have to go through an export licensing review process.

 

Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.

 

EEO is the Law: Notice of Applicant Rights Under the Law

 

Education Level: Other 
Travel Required: No

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