The mission of Intel’s Programmable Solutions Group (PSG) is to drive the future for FPGAs and Structured ASICs technology/solutions around the globe.

In the Structured ASIC group, you'll be surrounded by some of the brightest minds/engineers in the world.

As a EDA Tools SW Engineer in the Structured ASIC group working in QA and Testing, you will you will significantly contribute to the development and deployment of design software for implementing designs on advanced structured ASIC products

As a EDA Tools Software Engineer, you will have the following responsibilities:

• Develops and supports configuration management for EDA software development, establishes software build and release process, produces SW builds for release on an established cadence, works with SW QA for validating SW for release and deliver customer releases.

• Integrates, validates, and debugs software across the stack for a specific product, platform, feature, or technology.

• Designs and develops a software validation environment, the integration, and the enabling of the software stack.

• Responsible for the creation of validation plans, automation, associated methodologies, and triage and debugging of failures.

• Writes validation standards and procedures, analyzes the results to ensure correct functionality, triages failures, and recommends or develops corrective action.

• Assesses the state of the art and employs new methods to improve quality, automation, and product release efficiency.

The ideal candidate should exhibit the following behavioral trait:

• Strong communication skills and attention to detail are essential for success in this role.

Qualifications

You must possess the below minimum education requirements and minimum required qualifications to be initially considered for this position. Relevant experience can be obtained through schoolwork, classes, project work, internships, and/or military experience. Additional preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Education:

• Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field.

Minimum Qualifications:

• 5 plus years of experience in ASIC or FPGA design flows and EDA tools (including Verilog, Perl, TCL, or Shell).

Preferred Qualifications:

• MS in Electrical Engineering Computer engineering or related areas.

• Knowledge of RTL development and verification methodology.

• Skilled Linux Unix environment user.

• Expertise in using EDA tools such as Synopsys Design Compiler, VCS, and Prime Time.

• Experience with automated software testing.

Inside this Business Group

The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.

Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.