The Emulation Technology and Collaterals (ETC) team is chartered with driving emulation technology in support of the extensive emulation-based validation initiatives throughout Intel. ETC engineers work at the crossroads of emulation and simulation, software design and hardware design, pre- and post-silicon validation. Therefore, they have unique opportunity for wide contribution and for developing cross-discipline expertise.
Responsibilities include:
Develop and support Intel's emulation infrastructure used for creating, running and debugging hybrid emulation models composed of IP RTL, virtual (SW) components, transactors and other collateral elements. Team members define system architecture elements and develop hardware and software collaterals and integrate it with the emulation/FPGA models.
Test and debug the emulation/FPGA model and collaterals.
Define and develop new capabilities and HW/SW tools to enable acceleration of RTL and improve emulation/FPGA model usability for pre- and post-Silicon functional validation as well as SW development/validation.
Develop improvements to usability by RTL validation and debugging of failing RTL tests on the emulation platform.
Interface with and provide guidance to pre-Si Validation teams for optimizing pre-Si validation environments, test suites and methodologies for emulation efficiency.
Develop and apply automation aids, flows and scripts in support of emulation ease-of-use and improvement of equipment utilization.
As an Engineer in the ETC team you will be responsible for developing and supporting emulation infrastructure for design and validation engineering teams in key sites around the world. This position proves the opportunity to engage with our customers on day-to-day support, gathering and assess new feature requirements, develop HW/SW infrastructure, capabilities, tools and solutions which maximize the efficiency of Pre-Silicon Platforms emulation customers within Intel.
Qualifications
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications
The candidate must have a Bachelor's Degree in Electrical/Computer Engineering or Computer Science and 4+ years of experience -OR- a Master's Degree in Electrical/Computer Engineering or Computer Science and 3+ years of experience -OR- a PhD in Electrical/Computer Engineering or Computer Science and 1+ year of experience in:
SOC or IP design or verification
C/C++, Perl, Python and Shell scripting
GDB Verilog behavioral and synthesizable coding
Model building, simulating and debugging
Preferred Qualifications
Creating emulation models and infrastructure such as transactors, running and debugging emulation models
The everyday contributions of the Intel Validation Engineering (iVE) team are essential to retaining/regaining Intel's product leadership. We validate, debug, and tune the newest designs and world-changing technologies that enrich the lives of every person on earth. We play a critical role in completing the PRQs of Intel products and in Intel's ability to deliver the annual technology platforms in our roadmap.
Other Locations
US, California, Santa Clara;US, Oregon, Hillsboro
Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.
Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Work Model for this Role
This role is available as fully home-based and generally would require you to attend Intel sites only occasionally based on business need.
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