Sets priorities and goals for the team, drives results across various functions, ensuring an inclusive work environment, provides meaningful conversations to develop employees, and manage performance. Oversees definition, boundaries for formal verification, proper test planning, tracking, evaluating ROI, prioritizing team tasks based on project priorities and influencing key stakeholders. Verification of the microarchitecture using industry standard Formal Verification tools and technologies based on latest model checking and equivalence checking algorithms on world class design IPs (Graphics, Server IPs, processors and SOCs) . Using the hardware architecture design and RTL implementation details, define the Formal Verification scope, deploy the right strategy to prove the correctness while deploying advanced formal techniques and create abstraction models for convergence on the design, Carve out the right boundaries for the design, create comprehensive Formal Verification test plans, track, verify, apply abstraction techniques and converge on complex designs to deliver a high quality design on schedule and articulate the ROI. Analyzes new methodologies, evaluates new tools and corroborate results. May review vendor capability to support Formal Verificaiton development. Selects, develops, and evaluates Formal Verification engineers to ensure the efficient operation of the function.

Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Minimum Qualifications: The candidate must have a Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science or a related field with 6+ years experience -OR- a Master's degree in Electrical Engineering, Computer Engineering, Computer Science or a related field with 4+ years experience in the following: Computer architecture, digital design and verification methods RTL languages such as System Verilog or VHDL Fundamentals of formal verification technology, including model checking and writing formal assertions to express architectural intent of designs Formal verification principles and methods

Product Enablement Solutions Group (PESG) is one of the key pillars, enabling Intel product design teams get to market faster with winning leadership products.

Position of Trust

This role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter....

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.

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