If you are interested in being on a team that builds high performance supercomputers and enables scientists and their research, read on. The Accelerated Computing Systems and Graphics Group's High-Performance Computing Systems Integration Team is looking for someone to join us.

Our solutions are being used today to solve some of the world's most challenging scientific problems such as bio-medical research (Covid), climate research, genome analysis, renewable energy - all which require the world's fastest supercomputers to tackle. Intel needs your help to deliver the next generation in HPC systems and technology.

We are working with new technologies on our latest project, and a large part of your opportunity will be to debug leading edge integration issues. Being self-directed, curious, and having a keen desire to learn will be success factors in this role.

As a System Validation/Debug Engineer with experience in post-silicon (pre-si) validation, triage, and/or debug work, some of your tasks will be:

• Responsibility for the development of methodologies, execution of validation plans, and debug of failures

• Using broad understanding of multiple system areas to interact with Architecture, Design, and Pre-silicon Validation teams, for improving post-silicon test content

• Using and applying platform level tools and techniques to ensure performance is to specification

Qualifications

This is an entry-level position, and therefore, will be compensated accordingly

Minimum Qualifications and Experience:

 

A Bachelor's Degree in Electrical, Electronic, Computer Engineering, or Computer Science or a related discipline, with 1+ years' experience in coding in C/C++, Python, or similar coding language, along with one, or more, of the following skills: 

• Working in Linux

• Pre-silicon or post-silicon validation

• System level debugging

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Preferred Qualifications: 

• Board and/or Firmware debug experience

• High Performance Computing and/or cluster level debug

• Ability to isolate system failures through applications and end-user code (MPICH, MPI)

• Understanding of architecture and micro-architecture

• Hands-on lab experience with JTAG-based hardware debug tools

• Hardware system debug tools, including logic/network analyzers

• Documentation of plans, coding, and storing artifacts in a source-controlled environment

• Familiarity with GIT

For information on Intel’s immigration sponsorship guidelines, please see Intel U.S. Immigration Sponsorship Information

Inside this Business Group

The focus of Accelerated Computing Systems and Graphics (AXG) is to accelerate our execution in strategic growth areas of high-performance computing and graphics. AXG is chartered with delivering high performance computing and graphics solutions (IP, Software, Systems), for both integrated and discrete segments across client, enterprise and data center.  Our mission is to make zeta-scale computing accessible to every human on the planet by the end of this decade and to entertain, educate and connect billions of people with buttery smooth visual experiences.

Other Locations

US, Massachusetts, Hudson

Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.