Tracking and Validation of Hard IPs during their integration process into the project through all project milestones. Job involves analysis in multiple domains: layout, timing, power, netlist and more.

Qualifications

B.SC in Electrical Engineering or Computer Science (with passion for hardware).

Advantage will be given to any experience (even from degree's projects - let us know in CV) in the following fields:

Auto-place-and-route (APR) experience using Synopsys and/or Cadence synthesis.
Tcl scripting, Python scripting.

Hybrid but needed to arrive to PTK site twice a week.
 

Inside this Business Group

The Core and Client Development Group (C2DG) is a worldwide organization focused on the development and integration of SOCs, Core ™, and critical IPs that power Intel's leadership products, driving most of the Client roadmap for CCG, Delivering Server First Cores that enable continued growth for DCG and invest in future disruptive technologies.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.