Microsoft Azure is building the fastest and most reliable network in public cloud. As the public cloud platform for all Microsoft online properties, Azure provides a great channel for product impact that touches the lives of millions of users daily, in an environment at the cutting edge of high-performance computing. This effort also involves close collaboration with Azure Storage, the Azure Server team, and Microsoft Research (MSR) to help define the future of computing in this space.  

Responsibilities

Microsoft Israel is seeking a highly motivated, independent hardware design engineer to build innovative FPGA-based networking systems within a large design team.  

By leveraging the huge amounts of fine-grained parallelism delivered by current and future FPGAs, reconfigurable computing can radically accelerate many types of computations over our network.  

The ideal candidate will develop and deploy large-scale FPGA-based computations in the Cloud for challenging applications important to Microsoft and our customers and provide a platform for ongoing innovation. 

This includes FPGA applications, support systems, drivers, and interaction with a large software design team on important customer-facing applications. 

Come join us and be challenged daily as you build acceleration for some of the world’s largest datacenter networks. This is a great opportunity to learn from and join a team that has built some of the largest scale cloud systems ever deployed.    

Qualifications

• Key Qualifications: 

  • At least 4+ years, Proven track record of RTL large, complex designs 
  • Experience with verification methodologies, RTL and gate level simulations and debug 
  • Excellent communication skills and demonstrate the desire to take on diverse challenge 
  • Experience working in a team environment 
  • BSc/ MSc/PhD in Electrical Engineering, Computer Engineering, or equivalent experience 

    

  Preferred Qualifications: 

  • Experienced with large FPGA development on Altera/Intel or Xilinx devices 
  • Very familiar with FPGA CAD tools development flows including design entry in Verilog, synthesis, place and route, timing constraints and timing closure 
  • Hands on with lab FPGA debug methodologies  
  • Experience with designing and implementing networked systems such as switches, NPUs, or routers a plus. 
  • Experience with kernel and driver development – windows experience and network stack experience preferred. 
  • Experience with networking, industrial standard protocols (Ethernet, PCIe, RDMA etc.)  
  • Experience in distributed and fault-tolerant systems 
  • Experience debugging silicon, PCB issues, Hands on experience with lab debug 
  • Experience collaborating with hardware engineers, software programmers and device driver developers. 
  • Experience in C/C++, API and platform-level design 
  • Ability of writing scripts using Python/Perl 

   

  MSFT:AzureNetworking 

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Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, color, family or medical care leave, gender identity or expression, genetic information, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran status, race, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable laws, regulations and ordinances.  We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. If you need assistance and/or a reasonable accommodation due to a disability during the application or the recruiting process, please send a request via the Accommodation request form.

Benefits/perks listed below may vary depending on the nature of your employment with Microsoft and the country where you work.