We have a challenging position as an ATPG engineer for C2DG (Client Development Group) CPU design team. You will be part of the DFx team (Design for testability DFT, manufacturability DFM, debug DFD and validation DFV) and will have an opportunity to influence the way our future CPUs will be tested, validated, and debugged.

Responsibilities:
In this position you will take part in the design, validation and productization of our future products for the client market. Responsibilities will include the following:
• Own ATPG Stuck-at and AT-speed content development, Scan DRC (Design Rules Check) issues debug and resolution and integration into the HVM (High Volume Manufacturing) flows.
• Work with various teams and functions in the design and post silicon communities for driving solutions for reaching the product coverage goals.
• Support post silicon teams to help debug and characterize the ATPG content to enable robust content for production.
• Assist yield improvement and test time reduction effort.

Qualifications

You must possess a Bachelor of Science degree in Electrical Engineering or Computer Engineering. Previous experience with ATPG work for MUX-D or LSSD designs and post silicon related activities.
Experience in DFT (SCAN, JTAG, BIST, etc.) design or validation is an advantage. Additional qualifications include:
• Good communication/interaction skills among groups inside and outside of Israel.
• English language skills.

The Core and Client Development Group (C2DG) is a worldwide organization focused on the development and integration of SOCs, Core ™, and critical IPs that power Intel's leadership products, driving most of the Client roadmap for CCG, Delivering Server First Cores that enable continued growth for DCG and invest in future disruptive technologies.