We have a challenging position as a DFx design/validation engineer for C2DG (Core and Client Development Group) CPU design team. You will be part of the DFx team (Design for testability DFT, manufacturability DFM, debug DFD and validation DFV) and will have an opportunity to influence the way our future CPUs will be tested, validated, and debugged.

Responsibilities
In this position you will take part in design and validation of DFx features in one of our future CPUs. Responsibilities will include one or more of the following:
� Participation in definition of DFx solutions for future test/debug/validation needs.
� Logic design of DFx units and global debug features within the processor.
� Logic validation of DFx features at various hierarchy levels.

Qualifications

You must possess a Bachelor of Science degree in Electrical Engineering or Computer Engineering and experience with VLSI logic design can be an advantage. Experience in DFT (SCAN, JTAG, BIST, etc.) design or validation is an additional advantage. Additional qualifications include:
� RTL coding or validation experience.
� C, C++, Object Oriented and Perl programming skills under UNIX.
� Good communication/interaction skills among groups inside and outside of Israel
English language skills.

The Core and Client Development Group (C2DG) is a worldwide organization focused on the development and integration of SOCs, Core ™, and critical IPs that power Intel's leadership products, driving most of the Client roadmap for CCG, Delivering Server First Cores that enable continued growth for DCG and invest in future disruptive technologies.