The Custom Structured ASIC Engineering Group within Intel Programmable Solutions Group is seeking exceptional talent for IP Solutions Design Engineer to work with a diverse team designing Intel's next generation Custom Structured ASIC (Intel eASIC) based SOCs and Customer Design solutions - someone who is passionate to improve the way we solve complex problems through teamwork or direct contributions. In this position, the candidate would play a critical role in IP solutions for customer designs encompassing the architecture, best-in-class IP sourcing, logic design and implementation of IP/Subsystems of Custom Structured-ASIC SoCs within the Programmable Solutions Group (PSG). The candidate is expected to actively collaborate across in-house IP-engineering teams and best-in-class 3rd Party IP vendors and drive IP-solutions execution for different designs. The candidate would work closely with developers across IP Design, Verification, and Implementation engineers to ensure we develop IP and subsystems that meet our customers' needs. Candidate responsibilities include the following: � Design, Verification and Implementation of IPs and subsystems on Structured-ASIC (eASIC) fabric comprehending RTL coding, Integration of IPs, Synthesis, Simulation, Compilation, Timing Analysis, Power Analysis � Create reference IP and subsystem designs for eASIC implementation � Perform Subsystem Qualification for customized IP configurations for different designs � Perform design evaluations and recommend strategies to optimize designs for important design opportunities � Develop technical collateral and presentations for internal and external stakeholders

Qualifications

Minimum Qualifications � Bachelor or Master's degree in Electrical/Computer Engineering or Computer Science or related field with 5+ years of industry experience Preferred Qualifications � Design and implementation experience in IPs such as PCIe, DDR, Wireless, Ethernet protocols would be desired � Strong understanding of hardware design, design verification, timing analysis, clock domain crossing, and lint. � ASIC or FPGA design experience including Verilog/VHDL/System Verilog coding, Standard EDA flows and Synthesis tools(Design Compiler), Simulation (ModelSim/VCS/Incisive), timing closure (Primetime), Power analysis, design optimization and on-chip debugging � Strong Tcl, Perl and/or Python scripting skills � Strong verbal and written communication skills. � Strong independence and proven ability to set and meet own goals � Direct experience with integrating IPs and cross-functioning with IP teams

Inside this Business Group

The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.