An exciting opportunity to work on cutting edge High Speed IO technologies.

Responsibilities:

• In this position, you will define validation strategies, test plans, and methodologies for pre and post silicon functional end to end validation of IPs including Type C sub-system (TCSS), USB and test chips.

• You will be responsible for developing and running tests in emulation and post silicon environments to verify that the system meets specification requirements, and finding and implementing corrective measures for failing tests.

• In this role you will also debug failures in complex systems in both pre- and post-silicon environments.

What we offer: 

• We give you opportunities to transform technology and create a better future, by delivering products that touch the lives of every person on earth. 

• As a global leader in innovation and new technology, we foster a collaborative, supportive, and exciting environment where the brightest minds in the world come together to achieve exceptional results. 

• We offer a competitive salary and financial benefits such as bonuses, life and disability insurance, opportunities to buy Intel stock at a discounted rate, and Intel stock awards (eligibility at the discretion of Intel Corporation). 

• We provide benefits that promote a healthy, enjoyable life: excellent medical plans, wellness programs, and amenities, time off, recreational activities, discounts on various products and services, and much more creative perks that make Intel a Great Place to Work! 

We're constantly working on making a more connected and intelligent future, and we need your help. Change tomorrow. Start today.
 

Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying candidates.

Minimum Qualifications:

• The candidate must have a bachelor’s degree in Electrical/Computer Engineering or Computer Science and 4+ years of experience -OR- a Master's degree in Electrical/Computer Engineering or Computer Science and 2+ years of experience in the industry. 

• Ability to debug complex platform, HW, SW/FW and environment issues 

• Strong command of modern programming languages (C/C++/Python)

Preferred Qualifications:

• Silicon design and/or validation.

• Silicon/FPGA/emulation modeling and debug experience.

• Familiarity with High Speed I/O protocols and Bus Architectures, e.g. TBT, USB, PCIe, IOSF, AMBA Bus etc.

• Understanding of a subsystem HW/SW stack, including the silicon, all onboard HW components and connectors, external or plug-in adapters and devices, drivers, and applications.

• Highly motivated, curious, and a team player with keen interest in finding and resolving RTL bugs.

• Computer System Architecture experience.

Inside this Business Group

IP Engineering Group's (IPG) vision Build IPs that power Intel's leadership products and power our customer's silicon. We want to attract & retain talent who get joy in building high quality IP and share our core belief that IP is fundamental to transforming Intel's silicon design process. IPG's guiding principles will be ensuring Quality (Zero Bugs), Customer Obsession (Delight our Customers) and structured Problem Solving. We are a fearless organization transforming IP development.

Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.