Are you passionate to solve challenging problems on the cutting edge of technology?

Do you feel motivated to work with across functional teams in a fast-paced, agile and dynamic environment?

Are you energized by the opportunity to develop products that are used by millions of people around the globe?

 If so, we would love to hear from you!

we are looking for experienced candidates for Core Front End positions:

RTL: Frontend: +3 years of experience in ASIC development with Verilog/SystemVerilog, VHDL or Chisel. Experience with ASIC design verification, synthesis, timing/power analysis and DFT. Knowledge of high performance and low power design techniques; FPGA and emulation platforms.

Verification: +3 years of experience in RTL verification. Working on verification concepts and tools: UVM , Coverage Driven verification. Good understanding and knowledge of object oriented programming concepts: Verilog/ SystemVerilog/ Specman

Formal Verification: +2 years of experience in Formal verification.

Firmware: +3 years of experience in low-level development

** Please be informed that Intel is proactively trying to find candidates for the positions and that those positions may not be available at this time.

Qualifications

In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel’s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore’s Law and groundbreaking innovations.  DEG is Intel’s engineering group, supplying silicon to business units as well as other engineering teams.  As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.

Other Locations
Israel, Petah-Tikva;