Responsibilities include but are not limited to:
- Workload power analysis and characterization
- Development of flows to enable efficient and accurate power analysis
- Collaboration with cross functional teams to: -Provide power targets to design teams - Define power rollup and convergence methodology - Identify opportunities for power optimization in existing design - Identify new power saving features, define power optimization solutions - Correlate pre-silicon power estimation with actual silicon - Drive these optimizations into current and next-generation Client and Server Chipsets
In this role responsibilities include, although not limited to:
- Strong problem solving and analytical skills
- Excellent cross-functional communication and/or interaction skills
Qualifications
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications:
The candidate must possess a minimum of Bachelor Degree in Electrical Engineering, Computer Science, or equivalent degree, with 4+ years of experience in digital design or post silicon power measurements and correlation and in the following:
- Dynamic and leakage power estimation and reduction at architecture/RTL/block synthesis and circuit design level
- Strong chip/CPU level understanding required on power consumption, power estimation and low power design methods
- Silicon debug
- CPU and Chipsets architecture
- PERL and/or TCL and/or Shell*
- Spreadsheets tools
Preferred Qualifications:
- Proficiency with power estimation tools, such as PrimeTime-PX, and Power Artist, is an advantage
- Experience in power, thermal and performance is an advantage
- Experience with fab process is an advantage
In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel’s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore’s Law and groundbreaking innovations. DEG is Intel’s engineering group, supplying silicon to business units as well as other engineering teams. As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.
Get email alerts for the latest"Power Analysis and Optimization Engineer jobs in San jose"