工作职责：

• In this position, you will be responsible for ensuring the testability and manufacturability of integrated circuits from the component feasibility stage through production ramp. Make significant contributions to design, development and validation of testability circuits. Evaluation, development and debug of complex test methods. Develops and debugs complex software programs to convert design validation vectors and drive complex test equipment. Creates and tests validation and production test hardware solutions. Tests, validates, modifies and redesigns circuits to guarantee component margin to specification. Analyzes and evaluates component specification versus performance to ensure optimal match of component requirements with production equipment capability with specific emphasis on yield analysis and bin split capability. Analyzes early customer returns with emphasis on driving test hole closure activities. Creates and applies concepts for optimizing component production relative to both quality and cost constraints. Autonomously plans and schedules own daily tasks, develops solutions to problems utilizing formal education and judgment.

• Specific Tasks:

• Prepare for initial tapeout for new FRAM test chip.
• Coordinate post tapeout validation activities in preparation for initial silicon arrival.
• Problem-solve, configure, and optimize the product to maximize performance yield, cost, and reliability.
• Partner with Design Engineering, Process Engineering and Marketing teams to develop and ship successful products and end-systems.
• Provide technical training and expertise.
• Perform electrical failure analysis (EFA) and solve complex technical problems using both simulation and lab tools and techniques.
• Find solutions to challenging technical problems, using e.g. Verilog simulation, electrical failure analysis, and high volume data analysis. Work with package/quality/device/design teams in root-causing failure models and mechanism; and provide solutions.
• Develop Production, Reliability, and Characterization Test Flows on production and engineering platforms utilizing C++ and Python.
• Provide key contributions to cross-functional teams to solve critical technical problems through the various phases of product development.
• oviding correct test condition for the memory product and generate defined test flow for volume testing needs;
• Product Evaluation DOE for Reliability/defects improvements, wafer test and package test Yield improvement;

任职要求：

• 电子工程，微电子及相关专业硕士及以上学历，有工作经验者学历要求可适当放宽；
• 8年以上存储器产品开发/器件相关经验；
• 有铁电存储器（FRAM）经验者优先；
• 有很强的团队协作能力和沟通技巧；
• Experience In The following areas is a plus :
• gital logic design ? Verilog ? RTL ? Computer architecture ? VLSI design ? Scripting in TCL and/or Perl and/or Python Preferred Requirements ? Digital/Analog circuits ? Semiconductor validation.
• Experience with electrical test equipment such as oscilloscope, pulse generator, parameter analyzer. Prior experience working on a memory technology (e.g. NAND/NOR flash) is a must.
• 其它细节面谈。

上班地址：新吴区净慧东路

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