ESIP develops and delivers High Speed networking and communication IPs (such as Ethernet PHY, PCIE, USB-TypeC, DP/HDMI) to all Intel devices (Client and Servers CPU’s / Chipset / Controllers).

Team delivers state of the art analog PHYs (receivers and transmitters) circuits for the most advanced standards like 112Gb/s and higher Ethernet PHY in Intel/TSMC process (14nm/10nm/7nm/5nm).

About the role -
As a PHY system Engineer you will be working in a small team, on cutting edge technologies for high-speed wired communications.

You shall be involved the ARCH development stages, including various tradeoffs, such as power and performance.
Our team combines both pre-Si and post-Si work.

Therefore, you will work in Matlab and Simulink Simulation Environments.  

In addition, you will work on post-Si integration of the entire PHY level. This includes microcontroller FW coding, calibrations and more.

#IPG_IL

Qualifications

• Bachelor's degree from Electrical Engineering or Computer Engineering with an appeal for signal processing or communication (at least basic knowledge in signal processing).
• Above 3 years of relevant experience,
• Strong analytical and problem-solving skills.
• Knowledge in Matlab
• Knowledge in C++, and PYTHON - Advantage
• Hands-on lab/debug experience with measurement and debug tools such as high-end technology equipment - Advantage

IP Engineering Group's (IPG) vision Build IPs that power Intel's leadership products and power our customer's silicon. We want to attract & retain talent who get joy in building high quality IP and share our core belief that IP is fundamental to transforming Intel's silicon design process. IPG's guiding principles will be ensuring Quality (Zero Bugs), Customer Obsession (Delight our Customers) and structured Problem Solving. We are a fearless organization transforming IP development.

Other Locations

Israel, Petah-Tikva