PhD Thesis - ESD Device Research in Emerging Semiconductor Technologies:

Designing a protection circuit against electrostatic discharges (ESD) is a crucial part of any IO IP design and there is no IC in the field without appropriate ESD protection. The devices in the protection circuit operate at levels of current density and self-heating which are far beyond any regular operational condition. The integrated protection devices like specific ESD diodes need to be constructed in a way that they manage the extremely high transient current of many Amperes and high voltage in a time range of several 100 ns. The device development and the circuit integration need a deep understanding of the device physics. Test devices are investigated by Transmission Line Pulsing (TLP) to reveal the transient device behavior down to the picosecond regime. For a successful optimization the technology options for constructing ESD protection devices are studied by TCAD device simulation using electrothermal models. This gives insight into the current density and the self-heating behavior.
The thesis should address the novel technology options of the sub 2 nm CMOS technologies. This includes gate-all-around transistors, buried power rails and backside processing. In a next node, 2D channel materials will be considered. These aspects represent a major step forward compared to traditional, downscaled CMOS technology and opens new opportunities for ESD devices. The goal of the thesis is to evaluate and shape the technology options for novel ESD protection devices and develop ESD protection concepts for leading edge IC components including high speed interfaces of 224Gb/s and beyond. The RnD work is based at Intel Munich site affiliated with the ESD development team there and done in close collaboration with IMEC, Leuven, providing most advanced process modules for RnD technology development.

The PhD degree will be received from the EE department of Technical University of Munich. The academic supervision will take place at the Chair for Circuit Design ( https://www.ee.cit.tum.de/en/lse/home/ ).The thesis has to comply with the requirements of Technical University Munich.

Please note that the student needs to be enrolled for the full duration of the student employment.

Qualifications

- Master in EE , physics, or material science
- Understanding of device physics
- Social skills to operate a diverse RnD environment with multiple partners
- Fluency in English
- Flexibility to travel / work in a dual-site setup

Inside this Business Group

Product Enablement Solutions Group (PESG) is one of the key pillars, enabling Intel product design teams get to market faster with winning leadership products.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.