If you feel we are living the images and graphics era and you feel this is the place you want to develop and build a career, this opportunity is of your interest.
As a Physical Design Engineer, you will experience the real world of designing the next generation of circuits for graphics. You will be creating bottom up elements of chip design: cells, block level custom layouts, partition level, floor plans, full-chip. Will improve RC performance (Resistance and Capacitance) running extraction and layout verifications. Will debug using phases of physical design including results from: parasitic extraction, static timing, wire load models, auto-place and route algorithms, floor planning and full-chip assembly.
Will solve a wide variety of problems including difficult design and implementation of fixes with proactive intervention: programming, staffing, executing and verifying of complex chip developments while working in the latest silicon process for chip design nowadays.
All this requires knowledge and practical application of methodologies and physical design while you will be working with a wide variety of stakeholders in different regions.
The ideal candidate should exhibit the following behavioral traits:
- Good problem solving and analytical skills.
- Willing to work well in a team environment
Qualifications
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your school work/classes/research and/or relevant previous job and/or internship or Student experiences.
Minimum Qualifications:
- Bachelor degree, or advanced in Lic. degree (less than 1 year pending) in Electronic/Electrical Engineering or related fields.
- Intermediate English level.
- Candidate must have permanent right to work in Costa Rica
- Experience with ICC2, Workbench, Caliber tools: Synopsys or Mentor Graphics tools.
- Competent as partition or section layout designer.
Preferred Qualifications:
- + 1 year working as Student in Physical Design groups.
- Knowledge in semiconductor device physics, models and technology scaling.
- Experience in layout design for complex FUB/Section/Custom Layout or stepping/proliferation full-chip layout.
- Ability to comprehend issues of RC delay, electro-migration, self-heating, cross capacitance and good understanding of complex DRC rules.
- Ability to recognize failure prone layout structures, and proactively contact engineers for guidance and produce electrically robust layout.
- Perl/tcl and Python scripting knowledge.
- Hands-on experience with any of the industry tools for Graphics design.
The focus of Accelerated Computing Systems and Graphics (AXG) is to accelerate our execution in strategic growth areas of high-performance computing and graphics. AXG is chartered with delivering high performance computing and graphics solutions (IP, Software, Systems), for both integrated and discrete segments across client, enterprise and data center. Our mission is to make zeta-scale computing accessible to every human on the planet by the end of this decade and to entertain, educate and connect billions of people with buttery smooth visual experiences.
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.
Get email alerts for the latest"Physical Design Engineer ICE jobs in San jose"
