CCE Debug team is looking for a partner who is interested at resolving technical challenges, focus on growing technology competence, and a team leader or player on complicated platform issues. Debug team is responsible for debug and resolve issues on customer designs. The engineer in this position will be primary responsible for memory debug, from both HW and SW perspectives, including design configuration, usability and stability

Qualifications

BS/MS degree with min 6 years working experience on either HW/SW design & development, debug, customer support.
Familiar with PC architecture. Experience on JEDEC, MRC or memory issues is a plus
Candidates should be experienced or familiar with HW board level design and/or DDR memory related design
Hardware, Memory or Software debug experience is a plus
Minimum 5 years of industrial experience
Can work independently and co-work cross teams
Enthusiasm in learning opportunities; Interested in new innovative
Fluent in English and willing to travel

The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to continue to advance PC experiences to deliver the real-world performance people demand. As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products. As a result, we are able to fuel innovation across Intel, providing an important source of IP and scale, as well as help the company deliver on its purpose of enriching the lives of every person on earth.