DFx team delivers innovative and state-of-the-art DFX architecture and microarchitecture solutions for Intel PCH and SOCs. The team has complete engagement throughout Intel silicon life cycle (product concept to post silicon) and assumes end to end ownership of design, integration, validation and test content enabling for manufacturing.

As a Chipsets System on a Chip (SoC) DFx RL Design engineer, a typical day may include, but is not limited to:

DFx RTL Design Engineer
Perform DFx logic design RTL coding and integration into the Chipset SoC
Review and fix the DFx logic design to ensure all signal/clock connection, timing and etc. meet the design specifications with zero design errors
Knowledge and hands-on experience on MemoryBIST design is an added advantage
Strong communication skill to collaborate with geo-diverse teams (IP, SoC, Structural Design, IP, post-Silicon manufacturing) to analyze, debug, root cause and fix all DFx design issues

DFx Pre-silicon Validation Engineer
Understand Design-for-Debug (DFD), Design-for-Test (DFT), Design-for-Manufacturing (DFM) or Design-for-Validation (DFV) features through design specs
Develop and document test plan and test sources. Ensure all the RTL Design being validated well to eliminate design flawless to customer.
Perform test verification and enhancement to ensure design quality and robustness
Drive test review with counterparts such as Pre-Silicon SoC, IP design, Post-Silicon Manufacturing, Board Design and other teams
Take ownership and partner with Manufacturing and Validation team to enable the post-Silicon defect screening, burn-in and system validation
Knowledge and hands-on experience on DFx test environment is an added advantage

You are:
An excellent communicator
Extremely organized
A team player who loves to collaborate
A strong technical leader who communicates well with great influencing skills
Passionate for design/tools and methodology
Someone who meets their commitments
Motivated
Self-driven
Someone who wants to make a difference through technology

We are:
Open to new ideas and methodologies
A collaborative team demonstrating the best teamwork across Intel
Here to help you succeed
People who want to do innovative things

If your skillsets align with our needs, we will provide you a great path to maximize your positive impact to the world.

Qualifications

Bachelor/Master of Engineering or Science degree in Electronic, Electrical or Computer Engineering
Additional qualifications include:
Familiar with UNIX, and well-versed in Verilog or C Programming
Knowledge in RTL integration and validation methodologies
Knowledge in Design-for-X (DFx), where X is Test (DFT), Debug (DFD), Manufacturing (DFM) or Validation (DFV)
Familiar with Scan design, methodology, coverage analysis and test validation
Ability to communicate well with counterparts and key stakeholders including cross-site partners

Inside this Business Group

In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel’s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore’s Law and groundbreaking innovations.  DEG is Intel’s engineering group, supplying silicon to business units as well as other engineering teams.  As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.