Define VLSI Structural Design methodology and developing design flows.

Implement structural physical designs, such as synthesis, floor planning, power-grid and clock tree designs, timing budgeting and closure, place and route, RC-extraction and integration.

Verify structural physical designs, such as functional equivalency, timing/performance, noise, layout design rules, reliability and power.

Qualifications

You must possess a minimum of a Bachelor of Science degree in Electrical Engineering or a related field with more than 6 years of experience.
Additional qualifications include:
In depth exposure to VLSI structural physical design methodology flows and relevant EDA tools.
Proficient in scripting languages such as UNIX, Perl, TCL and knowledge of hardware description languages of VHDL Verilog.
Proven track record of results and execution in a tight schedule environment.

In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel’s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore’s Law and groundbreaking innovations.  DEG is Intel’s engineering group, supplying silicon to business units as well as other engineering teams.  As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.