Intel's Serdes IP design team is looking for experienced analog designers to join the best in the world Serdes design team. This team had many firsts in this area of design and our customer base is expanding rapidly. Some of our publicly announced products includes the Ethernet PHY design for 5 G base station. Another IP is the First 116 Gbps OIF/.CEI Serdes (Google "Intel 116Gbps Test Chip Demo v2"). This is just the tip of the iceberg, come and hear more in person. If admitted you will be joining a highly technical family of analog designers that are working on the next amazing inventions in a welcoming start-up-like environment. If this is what you are looking for come and apply today.

#IPG_IL

Qualifications

A degree in electrical engineering , MS and PhD are preferred.
At least 5 years of experience in analog circuit design.

IP Engineering Group's (IPG) vision Build IPs that power Intel's leadership products and power our customer's silicon. We want to attract & retain talent who get joy in building high quality IP and share our core belief that IP is fundamental to transforming Intel's silicon design process. IPG's guiding principles will be ensuring Quality (Zero Bugs), Customer Obsession (Delight our Customers) and structured Problem Solving. We are a fearless organization transforming IP development.