The position is for a senior GPU compiler architect in the GPU backend compiler team. This is a great opportunity to on work on state-of-the-art technologies to compiler design, development, debugger, and performance and programming languages. The main responsibilities include but not limited to
* Lead a backend team to design and implement new optimizations to improve performance and efficiency for intel GPU systems
* Work with GPU HW architects to co-design/define new uArch features and ISA for future Intel Graphics Processors
* Lead the effort to work with oneAPI frontend compiler teams on performance measurement and workload analysis for HPC workload
* Lead the effort to work on developing new POC backend compiler and defining portable ISA for a new graphics ISA project
* Review code change and design of team members
* Mentor and grow compiler technical talents in the team
* Write technical specification, design documents, and patent disclosures.
Qualifications
Minimum Qualifications:
* Master's or Ph.D. degree in Computer Science, Computer Engineering, Electrical Engineering or related technical discipline
* 8+ years of working experience in product compiler development
* 5+ years in C/C++ programming languages
* Familiar with LLVM compiler infrastructure, linker, assembler and debugger
* Familiar with compiler optimizations, e.g., transformations, dataflow/control-flow/dependence analysis, optimizations, and code generation
* Familiar with Computer Architecture and backend code generation technology Preferred
* Compiler development for data parallel programming languages, targeting SPMD and SIMD architectures
* Experience with performance analysis and tuning of compiler transformations and optimizations for modern HPC and AI workloads on GPUs.
The focus of Accelerated Computing Systems and Graphics (AXG) is to accelerate our execution in strategic growth areas of high-performance computing and graphics. AXG is chartered with delivering high performance computing and graphics solutions (IP, Software, Systems), for both integrated and discrete segments across client, enterprise and data center. Our mission is to make zeta-scale computing accessible to every human on the planet by the end of this decade and to entertain, educate and connect billions of people with buttery smooth visual experiences.
Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.
Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Position of Trust
This role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter....
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.
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