IPG TestChip Development Team is seeking a structural design engineer to join our talented and vibrant team.
You will be directly involved in Delivery of leading edge RISC-V based SoC designs on Intel's leading process nodes.
Key Responsibilities for this position includes but not limited to:
- Full chip implementation including Partitioning, Budgeting, Floor planning, Channel based and channel-less designs.
- Bump, RDL planning and Interface with packaging team
- CTS methodology implementation for the SoC
- Full Chip Implementation and support in Sign off closure - Timing, DRC, LVS, Reliability verification
- Continuous Handshake with Sub System teams and other stake holders to improve the sign off convergence timelines

Qualifications

Candidate should possess a BSEE or equivalent with 8+ years/MSEE or equivalent with 6+ years design experience in the structural/physical design domain.
Additional qualifications include:
- SoC Implementation Role in delivery of multiple SoCs, ASICs, or Sub Chips
- Proficient in all aspects of physical design from RTL - GDSII (Synthesis, Floorplan, Auto Place and Route, Clock Tree Synthesis).
- Expert level knowledge on Synopsys based implementation tools - ICC2, Fusion Compiler
- Experienced in CTS methodologies - CTS, MPCTS, CTMESH
- Expertise in High frequency timing closure at sub chip or at SoC
- Experienced in Full chip Layout Verification - DRC and LVS
- Experience on 7nm and lower a plus
- Possesses - Strong Technical Aptitude, Self-Driven, Analytical, Ability to work in diverse teams and Ability to multi-task.
- Motivated and Passionate to learn improvements in tool flows and methodologies
- Good Communication Skills - Partner with multiple stake holders to deliver the key responsibilities
- Hands-on experience with scripting languages such as Python, Perl, TCL

Inside this Business Group

IP Engineering Group's (IPG) vision Build IPs that power Intel's leadership products and power our customer's silicon. We want to attract & retain talent who get joy in building high quality IP and share our core belief that IP is fundamental to transforming Intel's silicon design process. IPG's guiding principles will be ensuring Quality (Zero Bugs), Customer Obsession (Delight our Customers) and structured Problem Solving. We are a fearless organization transforming IP development.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.

Legal Disclaimer:

Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.

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