Senior/Principal Layout Engineer, Zhubei
Dialog Semiconductor台灣Update time: September 17,2019
Job Description

About Us

Dialog Semiconductor is a leading provider of custom, highly-integrated and configurable mixed-signal ICs, backed by world-class manufacturing partners. We are a socially responsible employer pursuing programs that benefit our employees, stakeholders and community.

Dialog’s custom power management, configurable mixed-signal and highly-integrated connectivity ICs deliver outstanding efficiency, flexibility and performance advantages. Dialog’s ICs make it possible to develop the next generation of smart devices for consumers and businesses by enhancing product functionality, accelerating the pace of innovation and powering the smart connected future.

Dialog has a renowned reputation for flexible, dynamic support and world-class innovation. The world’s leading electronics manufacturers and suppliers trust Dialog to deliver, thanks to our decades of experience as an established business partner in the rapid development of custom ICs.

Dialog operates a fabless business model and is a socially responsible employer pursuing many programs to benefit the employees, community, other stakeholders and the environment we operate in. Dialog Semiconductor plc is headquartered in London with a global sales, R&D and marketing organization. In 2018, it had US$1.442 billion in revenue and was one of the fastest growing European public semiconductor companies. It currently has approximately 2,100 employees worldwide. The company is listed on the Frankfurt (FWB: DLG) stock exchange (Regulated Market, Prime Standard, ISIN GB0059822006) and is a member of the German TecDax index.


For more information, visit www.dialog-semiconductor.com http://www.dialog-semiconductor.com/.

Job Description

As part of our continued growth, we are seeking a Senior/Principal Layout Engineer for the CMBU TDC to do layout, fully verify mixed signal cells and chips according to wafer fab design rules as well as delivering high quality, manufacturable layouts in agreed timescales.

The Role

Working in the CMBU based in Zhubei |Taiwan, you will:
  • Conduct all silicon layout activities including top, cell and block level creation, editing and full verification.
  • Use state-of-the-art layout techniques for device matching, ESD, latch-up prevention and parasitic reduction.
  • Assist circuit designer with block and die size estimations.
  • Perform floor planning and power routing concept and design.
  • Instigate and participate in peer reviews for block and top-level layouts.
  • Suggest improvements to the team’s overall layout capabilities.
  • Demonstrate an awareness and understanding of semiconductor processes from physical point of view.
  • Maintain layout database that is consistent with current working practice (directory structures, etc.).
  • Work with agreed layout timescales to achieve high quality layouts within estimated block and die size.
  • Make continuous assessment and reporting of layout status and timescale risks.
  • Mentor more junior layout engineers.

What Are We Looking For?

  • 10+ years’ experience of block level through to top-level layout, including floor planning, power routing and full verification prior to tape-out.
  • Degree level qualification in electronics engineering or a related discipline
  • Layout experience in power management IC using BCD process.
  • Layout experience in analog circuits using logic or mix-mode processes.
  • Familiar with using current density and IR drop analysis tools.
  • Experience with layout of high performance analog blocks such as op amp, bandgap reference, LDO, OSC, switching converter etc.
  • Ability to independently create block and chip top level layout floorplan.
  • Ability to set up LVS, DRC, ERC environments and debug verification issues using Cadence and Mentor tools.
  • Knowledge of high performance analog layout techniques, shielding, use of dummy devices, thermal aware layout with consideration for electromigration.
  • Good communication skills and ability to work in teams.
  • Thorough understanding of layout effects in terms of circuit performance, yield and financial implication.
  • Demonstrable competence in design-for-manufacturing techniques.
  • Proficiency in providing accurate estimation of layout timescales.
  • Competence and expertise in providing quality layouts within deadline defined by project plans.
  • Good verbal and written English skill to work with multinational project teams.

Why Join Us?

We passionately believe that working at Dialog, you will be joining the brightest, most diverse and ambitious talent in the Semiconductor Industry. We are proud to have won numerous awards and designs, including exclusive patents that have assisted us to years of double-digit growth in this highly competitive industry. With growth planned for 2019, the opportunity for talent to progress at Dialog could not be greater. We are fast becoming the employer of choice within microelectronics chip design, power management solutions, short-range wireless connectivity and AC/DC power conversion.

If you'd like to explore working for Dialog Semiconductor further, then it's time we heard from you. Click below and apply now.


This publication is issued to provide outline information only, which unless agreed by Dialog Semiconductor may not be used, applied, or reproduced for any purpose or be regarded as a representation relating to products. All use of Dialog Semiconductor products, software and applications referred to in this document are subject to Dialog Semiconductor’s Standard Terms and Conditions of Sale, available on the company website (www.dialog-semiconductor.com) unless otherwise stated.

Dialog and the Dialog logo are trademarks of Dialog Semiconductor plc or its subsidiaries.

All other product or service names are the property of their respective owners.


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