The position is for HW engineer in the Full Chip Timing Backend Integration team which is a part of the C2DG Design group.You will participate in the definition, execution and convergence/signoff of FC STA activities. You will join the team which owns FC convergence & integration of Intel's lead productsYou will work closely with worldwide CPU design teams on FC timing flows. You will be familiar with design environment, flows, tools, methodologies and optimization methods used at Intel, which are Industry state of the art. You can leave your marking on future FC timing methodologies.

Qualifications

Bsc. Graduate or MSc. student in Electrical Engineering or Computer Engineering.
3-5 years experience in hardware computer design or VLSI design will be an added advantage.

Inside this Business Group

The Core and Client Development Group (C2DG) is a worldwide organization focused on the development and integration of SOCs, Core ™, and critical IPs that power Intel's leadership products, driving most of the Client roadmap for CCG, Delivering Server First Cores that enable continued growth for DCG and invest in future disruptive technologies.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.