The SOC Debug Engineer role has a single purpose which is to solve our most challenging product issues.

SOC Debug Engineers work with our internal product teams (Manufacturing/Validation/Software) and our customer teams during critical escalations to root cause system level failures and/or anomalies directly impacting our customers or jeopardizing our committed timelines.

They are responsible for performing low level and complex debug across multiple IP and system domains within a product, and will use their experience with/understanding of SOC design and architecture, Firmware, Bios and software to completely understand any issue and drive a resolution.

They are also expected to drive innovative debug capability improvements through new Design for Debug (DFD), debug tools and scripts to continuously improve the debug discipline.

Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Candidate must have a Bachelors in Electrical/Computer Engineering and 6+ years of experience -OR- Master's degree in Electrical/Computer Engineering with 4+ years of industry experience in:

• Reading and interpreting technical specs to come up with Microarchitecture and implement RTL design in System Verilog.

• Computer system architecture and Digital Design.

• Understand OVM/UVM methodology to interact with the Validation designers for Val content development.

Inside this Business Group

IP Engineering Group's (IPG) vision Build IPs that power Intel's leadership products and power our customer's silicon. We want to attract & retain talent who get joy in building high quality IP and share our core belief that IP is fundamental to transforming Intel's silicon design process. IPG's guiding principles will be ensuring Quality (Zero Bugs), Customer Obsession (Delight our Customers) and structured Problem Solving. We are a fearless organization transforming IP development.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.

Intel is committed to a culture of accessibility.  Intel provides accommodations to applicants and employees with disabilities.  Find information and request accommodation here