Responsible for delivering blocks and Sub Systems for complex and high performance Graphics SoC manufactured on leading edge process technologies and using the latest design methodologies/EDA tools
Working on RTL2GDSII Physical Design flows and ensuring timing, routing , quality closure of blocks

• Develop, analyze and debug solutions for design convergence challenges to meet design metrics like area, power and Performance
• Work in collaboration with Front End design team for addressing design challenges

Qualifications

• Candidate should possess a Bachelors or Masters in Electrical/Electronics Engineering or Equivalent
• 5-7 Years of SoC Physical Design Experience with industry standard tools like ICC, Fusion Compiler, Primetime, Redhawk, ICV, Calibre, Conformal
• Hands-on experience of block and full-chip floor-planning, Synthesis, APR, STA, electrical/reliability analysis, tapeout flows
• Knowledge of RTL-to-GDS2 flows through synthesis and P and R with targets for PPA
• Experience with scripting in Python, Perl and/or TCL
• Knowledge of logic design principles along with timing and power implications
• Good communication and team work skills

Inside this Business Group

The focus of Accelerated Computing Systems and Graphics (AXG) is to accelerate our execution in strategic growth areas of high-performance computing and graphics. AXG is chartered with delivering high performance computing and graphics solutions (IP, Software, Systems), for both integrated and discrete segments across client, enterprise and data center.  Our mission is to make zeta-scale computing accessible to every human on the planet by the end of this decade and to entertain, educate and connect billions of people with buttery smooth visual experiences.

Other Locations

India, Hyderabad

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.

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