Come join Intel's Devices Development Group organization as a Mixed Signal Validation engineer. In this position, you will be working as part of a pre-silicon validation team for future microprocessors and/or SoCs and will be responsible for mixed signal validation in the pre-silicon environment.

Your responsibilities will include but not be limited to:

• Functional validation of products with both analog and digital components in them using digital and mixed signal simulation tools.

• Defining and developing necessary validation infrastructure tests, checkers and occasional scripting in perl or unix shell to execute the validation plans to ensure functional correctness of the design.

• Participate in pre- and post-silicon debug of the design.

• Read and interpret technical specs and create high quality technical documentation.

• Understanding DUT specifications, digital logic and analog circuit implementation, defining validation strategy, creating test plans.

• Document validation plan and create appropriate software/content to execute to the plan.

Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.  

Minimum Qualifications:

• Candidate must possess a Bachelor's degree in Electrical or Computer Engineering or a related field and 4+ years' experience; OR a Master's degree in Electrical or Computer Engineering or a related field and 3+ years' experience ; OR a PhD in Electrical or Computer Engineering or a related field and 1+ years' experience

• Experience with basic analog, mixed signal circuits.

• Experience with mixed signal simulation tools like Discovery AMS / Cadence AMS or circuit simulation tools like Pspice and application of circuit analysis concepts.

• Experience with design principles and techniques in the following areas: Digital Logic Design and Simulation using Verilog / VHDL / SystemVerilog, Test Content Development, Testbench Development, Computer Architecture, Programming and scripting.

Preferred Qualifications:

• Experience creating testbenches in OVM/UVM.

Inside this Business Group

In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel’s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore’s Law and groundbreaking innovations.  DEG is Intel’s engineering group, supplying silicon to business units as well as other engineering teams.  As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.

Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.