SoC Design Engineer: Chipsets SoC Front
Intel CorporationFolsomUpdate time: August 29,2022
Job Description

Have you taken a career break and are now interested in returning to the workforce? Intel is offering a 20-week paid returnship for experienced professionals ready to return to the workforce. If you have 5+ years of professional experience and have taken a career break for 2+ years for any of the following, but not limited to reasons, we welcome you to apply:

  • Starting or raising a family.

  • Military service/military spouse.

  • Community service/volunteer work.

  • Caring for a family member or self.

  • Teaching.

  • Other.


At Intel we are excited to have a Return-to-Work program because we appreciate the skills individuals who are returning to work can offer. Through this program you will have the opportunity to revamp your skills, update your resume with new skills and experiences as well as make connections with others transitioning back into the workforce.


Come and be a part of the team creating SoC and chip-set designs and products for Intel Architecture. This position is a role within the Chipsets Silicon Group SoC Front-End Design team, building SoC products for client and server markets.

As the SoC Design Engineer you will be responsible for but not limited to:

  • Perform integration and validation of IP designs at the SoC level.
  • The work will include features and behaviors fundamental to the platform, as well as interoperability with the other IPs and blocks in the SoC and platform.
  • Work with, and gain exposure to, specialist teams and engineers including full-chip, micro-architecture, validation architecture, emulation modeling and validation, IP design, and structural / physical design.
  • Gain exposure on platform architecture, design, and features.
  • Participate in debug at various level of the hierarchy.


In addition to the qualifications listed below, the ideal candidate will demonstrate the following traits:

  • Communication skills.

  • Willingness to work in a team.

  • Leadership skills.


This position is hybrid at the Folsom or Santa Clara, CA Intel sites during the 20-week returnship program.

This position is not eligible for Intel immigration sponsorship


Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:
Candidates must have taken a career break for 2 or more years.

The candidate must possess a Bachelors in Electrical or Computer Engineering and 3+ years of experience or Masters degree in Electrical or Computer Engineering 2+ years of experience in:

  • System Verilog / OOP.

  • SOC-level design/integration and/or validation.

  • Simulation-based debug (VCS, Verdi, DVE).

  • Computer Architecture.


Preferred Qualifications:

  • Experience in OVM/UVM.

Inside this Business Group

In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel’s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore’s Law and groundbreaking innovations.  DEG is Intel’s engineering group, supplying silicon to business units as well as other engineering teams.  As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.



Other Locations

US, California, Santa Clara


Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.



Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.

USIntel Contract EmployeeJR0231004FolsomDesign Engineering Group

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