Seize this great opportunity to work with the SoC Front-End Design Micro-Architecture team who is responsible for providing technical leadership in the development of high quality and feature rich chipset products that millions of people around the world will use. The SOC Micro-Architecture Team is part of the Chipsets Silicon Group (CSG) within Design Engineering Group (DEG) and are responsible for developing and integrating Hard IPs, Soft IPs, Subsystems and Gaskets for client and server chipsets.

As a Micro-Architect, a typical day may include, but is not limited to:

• Becoming an expert and owning the development of a specific area of our SoC infrastructure (IP interconnect Fabrics, Clocks and Resets, Power Management, Boot and Reset Flows, GPIO's, High-Speed IO, etc.)

• Leading SoC-level features and strategic initiatives- Developing micro-architecture for SoC-owned logic blocks

• Building a strong technical understanding of specific IP's and developing expertise in how those IP's fit into SoC and platform level flows

• Providing day-to-day technical guidance and mentoring for SoC integration and validation teams

• Collaborating with pre-silicon and post-silicon validation teams on validation strategies, test plans, coverage matrices, debug, quality reviews, etc.

We are:

• Open to new ideas and methodologies

• A collaborative team demonstrating the best teamwork across Intel

• Here to help you succeed

• People who want to do innovative things

If your skillsets align with our needs, we will provide you a great path to maximize your positive impact on the world.

Qualifications

• Bachelor or Master's Degree in Electrical Engineering, Computer Engineering, or Computer Science with a focus on hardware design

• 8+ years designing or validating SoC's, CPU's, or IP blocks experience

• Knowledge of Hardware Description Languages (System Verilog, Verilog, or VHDL) and Static Timing Analysis

• Chipset products or IP's integrated into Chipset experience is a plus

• Design Quality checks and methodologies experience (Clock Domain Crossing, Linting, etc.)

• IP integration and/or SoC-level flows experience, including clocking, boot or reset entry, power management, Design for Test, Design for Debug, Security, IP interconnect fabrics, High speed IO integration and verification, IO sub-system integration and verification, etc.

• Experience with both pre-silicon and post-silicon product development stages

• An excellent communicator

• Extremely organized

• A team player who loves to collaborate

• A strong technical leader who communicates well with great influencing skills

• Someone who meets their commitments

• Motivated

• Self-driven

• Someone who wants to make a difference through technology

Inside this Business Group

In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel’s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore’s Law and groundbreaking innovations.  DEG is Intel’s engineering group, supplying silicon to business units as well as other engineering teams.  As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.