Come join Intel's Xeon Network Engineering Group (XNE) as an Undergraduate Engineering Intern working on exciting Networking SoC designs fueling industry leadership and growth.

We are seeking an undergraduate intern to work with a diverse team designing Intel's next generation server and networking SOCs. The candidate should be passionate about solving complex problems through direct contributions and team effort while working with and developing cutting-edge architecture, design, tools, and methodologies.

In this role, responsibilities include (but are not limited to):

• Work with SoC Design engineers to understand microarchitectural specifications, map features to product requirements, implement, and verify them.

• Work with other team members to develop tools, scripts, and documentation.

• Take part in the design and verification of SoC component(s), verify integration, SoC flows, e.g. Reset, Boot, Clocking, Fuses, Memory, Cores, Coherent Fabric, Coherent Links, PCIe, Ethernet, Accelerators, Performance, etc. in networking and server chips.

• Take part in development and debug of verification environment, test-benches, test-suite for quality verification of complex components, DUTs, and systems

Behavioral Traits:

• Be a team player, responsible, and can set and meet goals

• Strong written and verbal communication skills for interacting within team and with partner teams, e.g. architecture, design, etc.

Qualifications

Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:

Candidate must be pursuing a Bachelors degree in Computer Engineering, Electrical Engineering, Computer Science, or related fields and 3+ months of experience in some of the following:

• Microarchitecture

• Logic Design

• RTL

This position is not eligible for employment-based visa/immigration sponsorship.  Intel sponsors individuals for employment-based visas for positions where we experience a shortage of US Workers. These skills shortage roles are typically STEM contributing positions requiring a Master's or PhD degree, or a Bachelor’s degree with three years’ related  job experience.  This position does not qualify for Intel Sponsorship because it is either (1) a non-STEM contributing position, or (2) a STEM position that only requires a Bachelor’s degree and less than three years’ experience.


Preferred Qualifications:

• RTL/Logic design Verilog, System Verilog, VCS, Verdi, Spyglass etc.

• Modern CPU architecture areas, e.g. memory, cache hierarchy, coherent fabrics/links, PCIe, accelerators, performance, etc.

• Chip/VLSI design and verification

• TCL, Perl, Python and/or C++ programming

• Circuit design

• Static Timing Analysis, Lint, CDC, RDC, formal equivalence checking

Inside this Business Group

Xeon and Networking Engineering (XNE) focuses on the development and integration of XEON and Networking SOC's and critical IP's sustain Intels Xeon and 5G networking roadmap.

Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.