In this position you will have the opportunity to be part of a team that is pioneering the multi-foundry, multi-vendor path providing a great environment to learn and grow your design, verification, Tools Flows and Methodology (TFM) knowledge, automation skills, and will open the door to multiple career options going forward.

• Tool development and automation for IP and SoC configuration binary generation that becomes part of the overall software stack. The candidate will also be responsible for managing each binary release and support across multiple projects
• Drive automation wherever needed to increase engineering execution efficiency
• Drive TFM taskforces across customer, solution provider, and partners
• EDA Technical Support, Design Flow Enablement
• Provide first level debug to scope issues and collaborate with corresponding owners for closure

Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your school work/classes/research and/or relevant previous job and/or internship experiences.   

Minimum Qualifications:

The candidate must possess a Bachelor's or Master's degree in Electrical or Computer Engineering, Computer Science or a related field.

Experience with/in:

• Python, packages, classes, methods and properties
• Coding and scripting: Bash, Python, .Net
• Pre-Silicon Front-End design automation Tools, Flows, & Methodologies (TFMs)
• Unix/Linux and Windows operating systems

Intermediate to advanced English level

Preferred Qualifications:

• Major Pre-Silicon Front-End Design Automation tools (e.g., Synopsys VCS/Fusion Compiler/Spyglass, Cadence Conformal/Xcelium, Siemens Mentor Graphics Tessent, etc.)
• End-to-end understanding of Software Development Lifecycle (SDLC), including build automation, CI/CD, version control & release management.
• Experience with build management tools such as: GitLab CI, GitHub Actions, etc.
• It's a plus if candidate understands basic digital logic, RTL, microcontroller, firmware, basic security knowledge, encryption, and signing.

In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel’s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore’s Law and groundbreaking innovations.  DEG is Intel’s engineering group, supplying silicon to business units as well as other engineering teams.  As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.