Come join us and be a part of the team that validates the latest IP/SoC designs and products for Intel Architecture. This position involves verification of the next generation of Intel Client IP/SoCs, with a unique opportunity to work on next generation process nodes. Responsible to validate and integrate third party Intellectual Properties IPs ensuring they meet product specification and functionality before they are productized into physical chip.Successful applicants will be required to work very closely with design teams and architects to implement the low-level Register Transfer Logic (RTL) design to ensure overall good functionality of the chip. Develop specific test environment/platform, validation methodology and test plan to validate IP/System on Chip SOC design by identifying and exercising boundary conditions and special cases in an effort to break the chip to find that last elusive bug.

Qualifications

Bachelor degree or Master in Electrical and Electronics Computer Engineering or Computer Science with at least 5 years of relevant experience in System on Chip SOC design and validation experiences.

Inside this Business Group

In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel’s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore’s Law and groundbreaking innovations.  DEG is Intel’s engineering group, supplying silicon to business units as well as other engineering teams.  As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.

Other Locations

Malaysia, Kulim

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.