• Integrate, validate, and debug software across the stack for a specific product, platform, feature, or technology.
• Design and develop a software validation environment, the integration, and the enabling of the software stack.
• Responsible for the creation of validation plans, automation, associated methodologies, and triage and debugging of failures.
• Writes validation standards and procedures, analyzes the results to ensure correct functionality, triages failures, and recommends or develops corrective action.
• Assesses the state of the art and employs new methods to improve quality, automation, and product release efficiency.

• Planning, Developing and Enhancing Test Content and Capabilities (in C and/or C++, Assembly, Python, Perl).
• Executing new and existing Tests on the IP FPGA, SOC HFPGA, Emulation models.
• Debugging Test Failures/sightings using a variety of Debug Tools to perform characterization of the issue and identify the failing component. This will involve hands on experience in source-level debugging, I2C, oscilloscope and/or bus analyzers.
• Interfacing with Architecture, Design, and Pre-Silicon Validation teams in developing, modify and improving tests.

Qualifications

Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications

• Bachelor’s Degree + 2 years of experience / Master’s Degree in Electrical Engineering, Computer Engineering or Computer Science.
• 2+ years developing Software and driver development using C/C++ to validate/test Hardware.
• 2+ years Embedded Low level Software Experience.

Preferred Qualifications

• Intel architecture and/or micro-architecture with knowledge of processor, chipset, memory, I/O-subsystems, and bus protocols (USB, PCIe, Display Port, Type C, Low speed IOs, DDR).
• Knowledge of ARM, RISC-V.
• Experience in DMA architecture.
• Experience in Firmware development.
• Debugging Test Failures/sightings using a variety of Debug Tools to perform characterization of the issue and identify the failing component. This will involve hands-on experience in source-level debugging, oscilloscope and/or bus analyzers.

Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.

Inside this Business Group

The Infrastructure and Platform Solutions Group (IPSG) builds the silicon and platform infrastructure for Intel's silicon design teams. IPSG is comprised of a reusable pool of infrastructure IP blocks, design enabling services such as tools and automation, and a best-in-class post silicon ecosystem that ramps quickly to high volume manufacturing and validation. Our primary mission is to protect Intel's brand by providing the infrastructure necessary to enable all of Intel's products to hit the market on a dependable and predictable cadence.

Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.