Job Descriptions: Analyzer team is working on the development of front end (Analyzer and Elaborator) of different Mentor Compilers. This module deals with various HDL languages like Verilog, System Verilog and VHDL. As a member of the team, one will be working primarily on C++ and flex/bison and will be responsible for the design, development modify, and implementation of various pieces of the overall software with focus on surpassing customer expectations, on achieving high quality and on-time delivery. Responsible for ensuring the overall functional quality of the released product on all required platforms and mechanism. Ability to understand complex products, solutions, and problems. Creates, documents, and executes software designs which may involve complicated workflows or multiple product areas. Should have 1 to 4 years of experience Good knowledge of C++, algorithm and data structures Good problem solving and analytical skills The person should be self-motivated and can work independently. Should be able to guide others, towards project completion. Knowledge of Verilog, System Verilog, VHDL. Experience in development of Front End EDA software Good to have Knowledge of flex/bison. Understanding of gate level digital logic design. Experience in parallel algorithms, job distribution. Job Qualifications: B.Tech or M.Tech in CSE/EE/ECE from a reputed engineering college. Organization: Digital Industries Company: Mentor Graphics (India) Private Limited Experience Level: Mid-level Professional Job Type: Full-time