Intel's Serdes IP design team is looking for Senior Analog Engineer to join the best in the world Serdes design team.

Our group develops wide range of state of the art analog circuits for next generation processors, SerDes and ultra-high speed circuits, with Intel's most advanced development process in 10 and 7nm, and responsible for all development phases..

Team delivers state of the art technologies as 112G/224G Ethernet PHY in Intel process (14nm/10nm/7nm).

As a Senior Analog Engineer you will design, develop, modify and evaluate complex Analog and mixed signal circuits in a cutting edge technology, to various segments of SOCs from ultra-mobile devices to servers.

You will be challenged with complex designs, High speed dividers and SerDes micro arch definition.

You will use various simulation and validation tools/methods throughout the design cycle, conduct experimental tests and evaluate results.

Qualifications

• BSc, MSc or PhD in Electrical Engineering or Computer Engineering, specializing in analog circuits or communication
• At least 5 years of experience in analog circuit design.
• Knowledge in analog chip design.

Inside this Business Group

IP Engineering Group's (IPG) vision Build IPs that power Intel's leadership products and power our customer's silicon. We want to attract & retain talent who get joy in building high quality IP and share our core belief that IP is fundamental to transforming Intel's silicon design process. IPG's guiding principles will be ensuring Quality (Zero Bugs), Customer Obsession (Delight our Customers) and structured Problem Solving. We are a fearless organization transforming IP development.

Other Locations

Israel, Jerusalem

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.