We are seeking a dynamic individual to join the DCAI's Cloud Engineering Hardware (CE-HW) team as a Sr. Electrical HW Engineer. This individual will be part of a larger cross-functional Architecture/Engineering team (i.e. Board/ System, Thermal/Mechanical, SI/PI/PD, etc.) responsible for Co-Engineering Cloud Systems with strategic Cloud Service Providers (CSPs).

Additionally, this person will be a leader in CE-HW's Electrical and System Center of Excellence (CoE) - defining/driving/bringing to market new platform level innovations and solutions that:

• Proactively addresses platform, system, board, and component level issues our CSPs face- Integrate Intel's Adjacent Technologies/Solutions (i.e. Networking, PMEM, AI/Machine Learning, etc.).
• Drive new Platform/HW innovations that push next level performance and innovation within the CSPs environment.

Responsibilities will include but not be limited to:

• Architect and design electrical HW solutions that meet both internal and external requirements (system, board, and component level) that are optimized for the Cloud (internal Reference Platforms and/or Co-Engineered CSP platforms.
• Be the voice of Intel with our US based CSP customers in a Co-Engineering role; co-architecting/designing platforms/boards, addressing issues (Root Cause/Corrective Action), and influencing the technical direction of the program.
• Collaborate with various engineering disciplines (i.e. Thermal, Mechanical, Analog, FW, BIOS, SW, Validation, PnP) to Co-Engineer and optimize Intel's platform for the specific application of the CSP customers (i.e. Workloads, Usages, and Environments).
• Create new Platform/Electrical innovations that enable increased performance, remote debug, telemetry on Intel solutions.
• Work with internal stakeholders to be the CSP voice/feedback loop to the greater Intel (i.e. Influence future products, improve current and future PDGs, CSP challenges, and roadblocks, etc.).
• Analyze electrical test/validation data and correlate to internal data on internal RPs, determine opportunities for optimizations.
• Willing to work with key resources and stakeholders (i.e. Arch, Si design, SI/PI/PD, mechanical, thermal, BIOS, FW, PnP, etc.).
• Demonstrate a disciplined approach to problem solving and willing to make business decisions in a technical environment.
• Willing to work independently and in a solid team environment.
• Outstanding interpersonal communication skills both internally and customer facing verbal/ written.

Qualifications

The candidate must have a Bachelor of Science degree with a minimum of 4+ years of industry experience, Master of Science degree with 2+ years of industry experience, or PhD degree in Electrical Engineering or related field.

Additional qualifications include:

• Technical background in both board and platform design.
• Experience in schematic capture, PCB layout, and typical lab tools.
• Experience to lead the power-on, test, and debug of platform/board designs in the lab.
• Experience with eCAD design tools (i.e. Cadence OrCAD, Concept, and Allegro).

Inside this Business Group

The Data Platforms Engineering and Architecture (DPEA) Group invents, designs & builds the world's most critical computing platforms which fuel Intel's most important business and solve the world's most fundamental problems. DPEA enables that data center which is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologies—spanning software, processors, storage, I/O, and networking solutions—that fuel cloud, communications, enterprise, and government data centers around the world.

Other Locations

US, Arizona, Phoenix;US, California, Santa Clara;US, Oregon, Hillsboro

Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.